Designing a scalable, type-safe digital platform to formalize IoT makerspace operations and hardware innovation.

⚙️ Engineering PESIOT Spark

Building the Digital Backbone for Hardware Innovation at PES University

At PES University (EC Campus), the IoT Makerspace is a fast-moving environment for physical prototyping, student research, and hardware experimentation. However, as activity increased, a critical gap emerged — while the lab scaled physically, its digital infrastructure did not.

Hardware components were tracked manually, project documentation was fragmented, and institutional knowledge risked being lost every academic cycle.

PESIOT Spark was engineered at the request of the IoT Makerspace department to solve this problem — by creating a central digital gateway that bridges physical hardware workflows with structured digital management.

1. Problem Statement

Hardware labs are inherently chaotic. Sensors move between benches, projects evolve rapidly, and documentation often lives across notebooks, chats, and repositories.

The makerspace faced three core challenges:

  • No centralized hardware inventory tracking

  • No structured project lifecycle documentation

  • No persistent knowledge base for hardware hacks and research

The goal was clear:

Build a digital backbone that formalizes makerspace operations without slowing innovation.

2. What Is PESIOT Spark?

PESIOT Spark is a centralized operational platform for the IoT Makerspace that acts as:

  • A hardware inventory system

  • A project tracking and documentation hub

  • A long-term repository for IoT research and experiments

The platform was designed to be:

  • Scalable

  • Type-safe

  • Low-latency

  • Mentor-friendly

3. System Overview

[ Students / Faculty ]
          │
          ▼
[ PESIOT SPARK (Next.js Digital Gateway) ]
     │           │              │
     ▼           ▼              ▼
[ Inventory ] [ Projects ] [ Documentation ]

This architecture ensures clarity, traceability, and long-term knowledge retention across student cohorts.

4. Tech Stack & Rationale

Frontend

Next.js + TypeScript

TypeScript was a non-negotiable choice to ensure strict type safety across:

  • hardware components

  • project states

  • user roles

This prevents runtime errors during high-traffic lab hours.

Styling

Tailwind CSS

Adopted for a clean, professional engineering UI with high information density and minimal clutter.

Deployment

Vercel

Chosen for:

  • edge-optimized performance

  • seamless GitHub integration

  • zero-downtime deployments

5. Core Features

🔍 Hardware Discovery

A digital catalog of sensors, microcontrollers, and modules — reducing downtime during prototyping.

🧪 Project Lifecycle Tracking

Students document milestones and link physical hardware configurations with digital codebases.

🧑‍🏫 Departmental Oversight

Mentors monitor progress, review research, and manage resources without micromanagement.

6. Engineering Challenges & Solutions

Challenge: Digital vs Physical Drift

Problem: Hardware moves frequently, causing inventory mismatch.
Solution: Modular, status-driven data structures allowing rapid updates with minimal friction.

Challenge: Performance on Resource-Heavy Pages

Problem: Large inventories increased load time.
Solution: Next.js Image optimization and lazy loading, significantly improving LCP.

7. Performance & Reliability

  • Hosted on Vercel for low-latency campus access

  • Type-safe architecture ensures robust state handling

  • Stable under peak academic usage

8. Future Improvements

  • Real-time sensor data dashboards

  • QR-based hardware checkout/check-in

  • Direct hardware API integrations

👩‍💻 About Me

Aarti Panchal
Engineering student & builder focused on scalable systems, AI-driven platforms, and digital infrastructure.